The present disclosure relates generally to information handling systems, and more particularly to optional memory error checking for an information handling system.
As the value and use of information continues to increase, individuals and businesses seek additional ways to process and store information. One option is an information handling system (IHS). An IHS generally processes, compiles, stores, and/or communicates information or data for business, personal, or other purposes. Because technology and information handling needs and requirements may vary between different applications, IHSs may also vary regarding what information is handled, how the information is handled, how much information is processed, stored, or communicated, and how quickly and efficiently the information may be processed, stored, or communicated. The variations in IHSs allow for IHSs to be general or configured for a specific user or specific use such as financial transaction processing, airline reservations, enterprise data storage, or global communications. In addition, IHSs may include a variety of hardware and software components that may be configured to process, store, and communicate information and may include one or more computer systems, data storage systems, and networking systems.
Some IHSs include Error Correction Code/Error Checking and Correction (ECC) mechanisms that are used to detect and/or correct memory errors. For example, in single-bit error correction, ECC mechanisms may generate a check-byte for data sent across the memory bus by calculating that byte of data using an ECC algorithm. The check-byte is then used to check if the data is correct and, if the data is not correct, to correct the single-bit error. The check-byte is transferred together with the original data, so the bus for memory devices with ECC mechanisms are typically 72-bit wide as opposed to 64-bit wide for memory devices without ECC mechanisms. Enabling such ECC mechanisms for some IHSs can raise a number of issues due to, for example, the larger sized buses needed to enable ECC mechanisms.
Some conventional desktop IHSs include a memory coupler that is operable to couple a memory device to the IHS. The memory coupler typically includes enough connections to transmit memory signals and error check signals between a memory device and the IHS. A user of the conventional desktop IHS may then couple either a memory device with an ECC mechanism or a memory device without an ECC mechanism, both of which are sized to be coupled to the memory coupler, to the memory coupler depending on whether or not error checking and/or correction is needed for that conventional desktop IHS. However, for portable/mobile IHSs, space limitations in the IHS may limit the ability to provide for error checking and/or correction.
For example, some portable/mobile IHSs include memory couplers for memory devices such as, for example, Small Outline Dual Inline Memory Modules (SODIMMs) and/or other non-ECC enabled memory devices known in the art. The standard SODIMM couplers on portable/mobile IHSs do not provide support for ECC mechanisms or include the required connections to transmit signals for error checking and/or correction. In order to provide for error checking and/or correction, small module standards that include ECC mechanisms such as, for example, mini-DIMMs, may be provided, but these require larger memory couplers that will only couple mini-DIMMs to the IHS, which raises costs and limits manufacturing and after-manufacture flexibility to the use of only those ECC-enabled memory devices.
Accordingly, it would be desirable to provide memory error checking for an IHS absent the disadvantages discussed above.